Struct spidev::SpidevOptions [] [src]

pub struct SpidevOptions {
    pub bits_per_word: Option<u8>,
    pub max_speed_hz: Option<u32>,
    pub lsb_first: Option<bool>,
    pub spi_mode: Option<SpiModeFlags>,
}

Options that control defaults for communication on a device

Individual settings may be overriden via parameters that are specified as part of any individual SpiTransfer when using transfer or transfer_multiple.

Options that are not configured with one of the builder functions will not be modified in the kernel when configure is called.

Fields

bits_per_word
max_speed_hz
lsb_first
spi_mode

Methods

impl SpidevOptions

fn new() -> SpidevOptions

Create a new, empty set of options

fn bits_per_word(&self, bits_per_word: u8) -> SpidevOptions

The number of bits in each SPI transfer word

The value zero signifies eight bits.

fn max_speed_hz(&self, max_speed_hz: u32) -> SpidevOptions

The maximum SPI transfer speed, in Hz

The controller can't necessarily assign that specific clock speed.

fn lsb_first(&mut self, lsb_first: bool) -> SpidevOptions

the bit justification used to transfer SPI words

Zero indicates MSB-first; other values indicate the less common LSB-first encoding. In both cases the specified value is right-justified in each word, so that unused (TX) or undefined (RX) bits are in the MSBs.

fn mode(&self, mode: SpiModeFlags) -> SpidevOptions

Set the SPI Transfer Mode

Use the constants SPI_MODE_0..SPI_MODE_3; or if you prefer you can combine SPI_CPOL (clock polarity, idle high iff this is set) or SPI_CPHA (clock phase, sample on trailing edge iff this is set) flags.

Note that this API will always prefer to use SPI_IOC_WR_MODE rathern than the 32-bit one to target the greatest number of kernels. SPI_IOC_WR_MODE32 is only present in 3.15+ kernels. SPI_IOC_WR_MODE32 will be used iff bits higher than those in 8bits are provided (e.g. Dual/Quad Tx/Rx).

Trait Implementations

Derived Implementations

impl Clone for SpidevOptions

fn clone(&self) -> SpidevOptions

fn clone_from(&mut self, source: &Self)